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Latest EDA News
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MunEDA WiCkeD Tool Suite to Enhance Circuit Analysis, Performance and Yield Optimization Has Been Selected by Toshiba (Jun. 27, 2011)
MunEDA today announced that Toshiba Corporation selected the MunEDA WiCkeD� tool suite for an integral part of its custom IC design flow. -
Sibridge Technologies Ensures Maximum IP Reliability with Blue Pearl's Next Generation Software (Jun. 22, 2011)
Sibridge will utilize the Blue Pearl Software Suite to provide immediate feedback on design analysis and CDC (clock domain crossing) checking, incorporating new visualization techniques for validating automatically generated timing constraints. -
User View: Low Power Challenges at 40nm and Below (Jun. 22, 2011)
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Synopsys Custom Design Solution Enables Moortec Semiconductor to Tape Out High-performance Analog IP (Jun. 13, 2011)
Synopsys today announced that Moortec has taped out its high-performance analog IP on TSMC's 40LP and 28HP processes using Synopsys' custom design solution and TSMC's interoperable process design kits (iPDKs). -
Dolphin Integration brings relief to Assertion-Based Verification (Jun. 10, 2011)
New releases of SLED SDG and SMASH provide extended support of PSL, the Property Specification Language, allowing the generation of property-based random test patterns and the verification of PSL assertions on designs using multiple clocks. SMASH 5.17 also provides state-of-the-art compliance with the subset of System Verilog Assertions (SVA) dedicated to Assertion-Based Verification. -
Arteris Supporting Deployment of ARM's AMBA 4 ACETM Specification (Jun. 09, 2011)
Arteris today announced its support for AMBA 4 ACE, the second phase of the AMBA 4 specification. Arteris has contributed to the deployment of new AMBA 4 technologies, such as virtual memory and memory barriers. -
Arteris Joins TSMC Reference Flow 12.0 With Flexnoc Network-on-Chip (NoC) Interconnect IP (Jun. 09, 2011)
Arteris today announced that its NoC interconnect IP and tools will be available to TSMC customers as part of TSMC Reference Flow 12.0, the foundry's latest design reference flow to enable its advanced 28nm process technology. -
OCP-IP Delivers Memory Model Package (Jun. 08, 2011)
OCPIP today announced the availability of an Accurate Dynamic Random-Access Memory Model (ADM) package. The ADM is a configurable, transaction-level model for Dynamic Random-Access Memories (DRAMs). -
CEVA and Carbon Design Systems Partner to Offer Fast Simulation Models for CEVA DSPs (Jun. 07, 2011)
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Sonics Named as Early Supporter for Phase Two of the AMBA 4 Specification (Jun. 06, 2011)
Sonics, Inc.�, today announced that it will support AMBA 4 AXI Coherency Extensions (ACE�), the second phase of the AMBA� 4 protocol unveiled this week at the Design Automation Conference (DAC) in San Diego.




