Simha Sethumadhavan

New York, New York, United States
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Patents

  • System and Methods for Silencing Hardware Backdoors

    Issued US 9,325,493

    Other inventors
  • System and Methods for Silencing Hardware Backdoors

    Issued US 9,037,895

    Other inventors
  • System and Methods for Precise Microprocessor Event Counting

    Issued US 8,855,970

    Other inventors
  • Unordered Load/Store Queue

    Issued US 8,447,911

    Other inventors
  • Dynamically Composing Processor Cores to Form Logical Processors

    Issued US 8180997

    Other inventors
  • DIVERSIFIED INSTRUCTION SET PROCESSING TO ENHANCE SECURITY

    Filed US 14/946961

    Other inventors
  • SYSTEMS AND METHODS TO COUNTER SIDE CHANNELS ATTACKS

    Filed US 14/383206

    Other inventors
  • IDENTIFICATION OF BACKDOORS AND BACKDOOR TRIGGERS

    Filed US 14/773104

    Other inventors
  • Dependence Prediction in a Memory System

    Filed US 20100325395

    Other inventors

Honors & Awards

  • Top Picks from the 2022 Computer Architecture Conferences

    IEEE Micro

    E. Manzhosov, A. Hastings, M. Pancholi, R. Piersma, M. T. I. Ziad and S. Sethumadhavan, "Revisiting Residue Codes for Modern Memories," in IEEE Micro, vol. 43, no. 4, pp. 53-61, July-Aug. 2023, doi: 10.1109/MM.2023.3273489.

    Abstract: This article shows how residue codes, traditionally used for compute rather than storage error correction, can be applied to memories with surprising results. We show that adapting residue codes to modern memory systems offers a level of error correction…

    E. Manzhosov, A. Hastings, M. Pancholi, R. Piersma, M. T. I. Ziad and S. Sethumadhavan, "Revisiting Residue Codes for Modern Memories," in IEEE Micro, vol. 43, no. 4, pp. 53-61, July-Aug. 2023, doi: 10.1109/MM.2023.3273489.

    Abstract: This article shows how residue codes, traditionally used for compute rather than storage error correction, can be applied to memories with surprising results. We show that adapting residue codes to modern memory systems offers a level of error correction comparable to those of traditional schemes, such as Reed–Solomon, but with fewer bits of storage. For instance, our adaptation of residue codes—multiuse error-correcting code (MUSE ECC)—can offer ChipKill protection using approximately 30% fewer bits. We use the storage gains to hold the metadata needed for emerging security functionality, such as memory tagging, or to provide better detection capabilities against Rowhammer attacks. In a system with memory tagging and MUSE, we achieve a 12% reduction in memory bandwidth utilization with the same error correction level as a traditional ECC baseline and without a noticeable performance loss. Thus, our work demonstrates a new, flexible primitive for co-designing reliability with security and performance.

    URL: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10122478&isnumber=10167507

  • Distinguished Paper Award

    Usenix Security 2017

    CLKSCREW: Exposing the perils of security oblivious energy management. Adrian Tang, Simha Sethumadhavan, and Sal Stolfo.
    Preprint: http://www.cs.columbia.edu/~simha/preprint_USENIX17_clkscrew.pdf

  • Top Picks from the 2016 Computer Architecture Conferences

    IEEE Micro

    Analog Computing in a Modern Context: A Linear Algebra Accelerator Case Study: Yipeng Huang, Ning Guo, Mingoo Seok, Yannis Tsividis, and Simha Sethumadhavan

  • Best of CAL 2016

    IEEE Computer Architecture Letters

    For the paper on Hardware Enforced Statistical Privacy with Matthew Maycock. First work on discussing hardware support for Privacy.

  • Distinguished Paper Award

    24TH IEEE INTERNATIONAL CONFERENCE ON PROGRAM COMPREHENSION

    Paper: Identifying Functionally Similar Code in Complex Codebases

    w/ Fang-Hsiang Su, Jonathan Bell, Gail Kaiser

  • Best Poster Award

    Hot Chips: A Symposium on High Performance Chips (27th Hot Chips)

    Poster Link: (http://www.cs.columbia.edu/~simha/hc27AVdemo.jpg)
    Demo Video: (https://drive.google.com/file/d/0B58y14EaaEacbUJoRkMzeTgtMDg/preview)

    Adrian Tang & John Demme were honored at Hot Chips conference with a best poster award for their poster and demo titled "A Silicon AntiVirus Engine"​. Using a FPGA co-processor attached to an Intel Windows box, Adrian and John were able to use performance counter data from the Windows machine to identify unseen malware. They showed a live…

    Poster Link: (http://www.cs.columbia.edu/~simha/hc27AVdemo.jpg)
    Demo Video: (https://drive.google.com/file/d/0B58y14EaaEacbUJoRkMzeTgtMDg/preview)

    Adrian Tang & John Demme were honored at Hot Chips conference with a best poster award for their poster and demo titled "A Silicon AntiVirus Engine"​. Using a FPGA co-processor attached to an Intel Windows box, Adrian and John were able to use performance counter data from the Windows machine to identify unseen malware. They showed a live demo at the Hot Chips conference!

    Adrian and John work with Simha Sethumadhavan & Sal Stolfo.

  • Advisor on Best Student Paper Award

    ACM SIGSAC: 20th ACM Conference on Computer and Communications Security

    My students Adam Waksman (CS PhD) and Matthew Suozzo (CS Junior) have been recognized with a “Best Student Paper Award” at the CCS 2013. Our paper “FANCI: Identification of Stealthy Malicious Logic Using Boolean Functional Analysis” describes a method for detecting backdoors in hardware circuits before the hardware is manufactured and sent to the market. This is the first purely static analysis technique for detecting hardware backdoors. Papers with more than 50% student co-authors were…

    My students Adam Waksman (CS PhD) and Matthew Suozzo (CS Junior) have been recognized with a “Best Student Paper Award” at the CCS 2013. Our paper ��FANCI: Identification of Stealthy Malicious Logic Using Boolean Functional Analysis” describes a method for detecting backdoors in hardware circuits before the hardware is manufactured and sent to the market. This is the first purely static analysis technique for detecting hardware backdoors. Papers with more than 50% student co-authors were eligible for the best student paper award, and only three of 530 submissions received this honor.

  • Top Picks from the 2012 Computer Architecture Conferences

    IEEE Micro Magazine Top Picks Issue

    A Quantitative, Experimental Approach to Measuring Processor Side-Channel Security

  • Sloan Fellowship

    Alfred P Sloan Foundation

  • CAREER Award

    National Science Foundation

    Trustworthy Hardware from Untrustworthy Components

  • J.C. Browne Fellowship

    Department of Computer Sciences, UT-Austin

    Outstanding Graduate Students in Computer Sciences

  • Teaching Assistant Excellence Award

    Department of Computer Sciences, UT-Austin

    For dedication and outstanding service

  • Top Picks from the 2003 Computer Architecture Conferences

    IEEE Micro Magazine Top Picks Issue

    Scalable Hardware Memory Disambiguation - One of the Most Industry Relevant Architecture Research Papers in 2004.

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