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jordancarlin/README.md

Hi there 👋

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  1. cvw cvw Public

    Forked from openhwgroup/cvw

    CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

    SystemVerilog 1

  2. cvw-arch-verif cvw-arch-verif Public

    Forked from openhwgroup/cvw-arch-verif

    The purpose of the repo is to support CORE-V Wally architectural verification

    SystemVerilog

  3. sail-riscv sail-riscv Public

    Forked from riscv/sail-riscv

    Sail RISC-V model

    C 1

  4. hmc-e155-portfolio hmc-e155-portfolio Public

    CSS