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1. openlane-examples openlane-examples Public

   Examples from the Openlane repository, adapted as Fusesoc cores

   Verilog 12 5

2. chip_integration_test chip_integration_test Public

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3. subservient_wrapped subservient_wrapped Public

   The Subservient processor wrapped together with some memory for inclusion in the Caravel user project area.

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4. caravel_subservient caravel_subservient Public

   Forked from efabless/caravel_user_project

   https://caravel-user-project.readthedocs.io

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5. caravel_user_project caravel_user_project Public

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