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Working from home
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Working from home
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searsm8/README.md
  • 👋 Hi, I’m Mark Sears
  • I'm a PhD student at UT Dallas studying FPGA implementation, tools, and algorithms.
  • Right now I'm working on implementing a placement algorithm on the Xilinx Versal architecture.
  • You can email me at mark.sears@utdallas.edu

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  1. AIEplace AIEplace Public

    Implementation of the ePlace algorithm on the AMD Versal architecture, utilizing AIE, PL, and PS regions of the chip.

    C++ 11 7

  2. mlir-aie mlir-aie Public

    Forked from Xilinx/mlir-aie

    An MLIR-based toolchain for Xilinx Versal AIEngine-based devices.

    MLIR

  3. ISPD_2020 ISPD_2020 Public

    Code for the International Symposium of Physical Design (ISPD) 2020 Contest Objective is to provide heuristic solutions for Cerebras' Wafer Scale Engine (WSE)

    C++ 3 3

  4. DSE DSE Public

    Scripts to perform Design Space Exploration (DSE) using CyberWorkBench High-Level Synthesis tool

    Python 1

  5. FM_Partitioning FM_Partitioning Public

    Program which implements Fiduccia–Mattheyses partitioning algorithm

    C++ 3

  6. MSDAP MSDAP Public

    Verilog project to implement an ASIC chip from specification to tape out. Performs audio filtering, known as the Mini Stereo Digital Audio Processor (MSDAP)

    Verilog 6