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  1. ICRTL-Benchmark ICRTL-Benchmark Public

    ICRTL Benchmark: Industrial-level RTL design challenges for evaluating PPA optimization, code generation, and LLM applications in EDA.

    SystemVerilog 22

  2. keyword_spotting keyword_spotting Public

    private

    Verilog 2

  3. DClab_2024 DClab_2024 Public

    SystemVerilog 1

  4. LCD_FPGA LCD_FPGA Public

    It's a github for LCD on FPGA (DE2115), the code clearly seperate the combinational logic and sequential logic. Easy to understand.

    SystemVerilog 1

  5. ACVSD_final ACVSD_final Public

    SystemVerilog 1

  6. ACA_final ACA_final Public

    Python 1