Foundry Industry Model
One bundle covers the whole chain, from EDA design activity to customer wafer demand: wafer shipments, ASPs, capacity, utilization, node mix, margins, and capex, foundry by foundry, with TSMC forecast quarterly through 2030.
- Foundries
- 20+ tracked
- History
- 20+ years
- Forecasts
- TSMC to 2030
- Cadence
- Quarterly
One model for the whole foundry market.
The SemiAnalysis Foundry Industry Model connects end markets and chip programs to process-node demand, capacity, utilization, wafer pricing, investment, depreciation, and margins, foundry by foundry. Capacity expansions, wafer pricing moves, and customer mix shifts are quantified before they show up in earnings.
Every number is reconciled the hard way: foundry commentary is triangulated against customer, supplier, and peer data each quarter, on top of more than twenty years of quarterly history for the top five players and a decade or more for the rest.
Who uses it, and what it decides.
The buyers of this model, and the calls they make with it. Customer wafer-demand models connect device volumes to node-level wafer starts on the demand side.
- Public & private market investors
- Utilization and node mix turn before revenue and margins do. The model quantifies capacity expansions, wafer pricing, and customer shifts ahead of the print, across TSMC, Samsung, Intel Foundry, and the rest of the universe.
- Fabless & semiconductor strategy teams
- Where wafer supply, pricing power, and capacity actually sit, node by node, when sourcing decisions and supply agreements are on the table.
- Equipment & materials suppliers
- Capex, fab build plans, and installed capacity by node translate directly into tool and materials demand, standardized to SEMI norms for comparability.
- Economists & policy teams
- The geography of wafer production and its shifts, on twenty years of history and forecasts through 2030: leading edge concentration, the mature-node buildout in China, and every new fab in between.
From wafer starts to income statement.
Shipments, pricing, capacity, customers, and financials, tracked per foundry and per node, then forced to agree with each other.
The market, counted
Revenue and wafer shipments broken down to the level the business is actually run at:
Revenue by node
Foundry and wafer revenue per process node, with the node mix that drives blended results
Wafer ASPs
Average selling prices by node and by foundry, the clearest read on pricing power in the industry
Non-wafer streams
Mask, packaging, and service revenue lines separated out so wafer economics stay clean
Capacity & utilization
The supply side of every wafer agreement, tracked before it becomes revenue:
Installed capacity
Capacity by node and by foundry, built bottoms-up from wafers-per-tool calculations
Utilization by node
The loading rates that lead revenue and margin inflections by quarters
Capex & build plans
Capital spending and fab construction tracked plan by plan, shell by shell
The customers behind the wafers
Wafer starts attributed to who ordered them and what they become:
TSMC × Apple
The industry’s most important customer relationship modeled in detail, node by node
Starts by end market
Wafer starts by customer and end market, from AI accelerators to automotive and industrial
Revenue by region
Application and regional splits that show where demand actually originates
The financials, reconciled
Gross margins, R&D, depreciation, COGS, and inventory per foundry, estimated with bottoms-up cost models, back-tested against reported results every quarter, and reconciled against what customers, suppliers, and peers are saying, so the numbers agree with the world, not just with the press release.
The bundle
One bundled product combines the core foundry metrics with the models around them:
Customer wafer-demand models
Apple, Intel, and Huawei product shipments mapped to the chips inside each device, then to wafer demand by node and foundry. Nvidia, AMD, Qualcomm, MediaTek, Marvell, and Broadcom models extend the framework next.
EDA Model
Financials, backlog, remaining performance obligations, and design-activity signals for Synopsys, Cadence, Ansys, Keysight, Silvaco, and PDF Solutions. Tape-outs lead wafer starts, and EDA bookings lead tape-outs. Ships with a live EDA dashboard.
Analog and power supply-demand
Market revenue and 200mm-equivalent wafer demand across automotive, industrial, datacenter, and renewables, reconciled against IDM and specialty-foundry capacity for Texas Instruments, Infineon, STMicroelectronics, onsemi, and peers.
TSMC MOPS Capital Budget Model
An annual capex predictor built from roughly 20 years of board-approved Taiwan filings. Equipment and construction authorizations set the capex floor and flag vendor signals before guidance moves.
Device wafer-demand models
Smartphone and tablet models connect unit shipments and silicon content to wafer requirements by customer, foundry, and node. PC and server models extend the framework next. Accelerator wafer data is available in the Accelerator & HBM Model.
The lithography step.
Light projects the reticle pattern onto one die at a time: a slit of light scans the field while the reticle glides in sync, then the wafer steps to the next die. A leading-edge wafer repeats this for dozens of mask layers.
Why this step sets the price of a wafer
Leading-edge nodes take far more lithography passes per wafer than mature ones, on far more expensive tools. Node mix is why one fab earns multiples of another per wafer start, and why utilization moves margins before revenue shows it.
The model tracks:
- Wafer starts
- Shipments
- ASPs by node
- Capacity
- Utilization
- Node mix
- Margins
- Capex
Decorative animation of the lithography step: a slit of light scans a pattern onto each die and the wafer steps between fields, with field and layer counters. Illustrative only.
The animation is illustrative. Real flows expose each die for every mask layer of the node, and the model carries the economics of that repetition: ASPs, capacity, and utilization by node and foundry.
How the model is built.
Bottom-up from the tools, triangulated across the supply chain, and back-tested against every reported quarter.
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Start from the tools
Proprietary wafers-per-tool calculations and fab build plan tracking set installed capacity by node, standardized to SEMI norms. Leading-edge wafer starts are built bottom-up, fab by fab, from our customer wafer-demand models.
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Triangulate the quarter
Filings, conference materials, customs data, and primary research are checked against fabless customer revenue, COGS, and inventory. Foundry commentary has to agree with what customers and suppliers report.
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Back-test the output
Bottom-up cost models estimate margins per foundry. Every forecast is back-tested against reported results before the next release ships.
Research that ships with the model.
Model subscribers receive the update notes, webinars, and analysis published against each release. A sample of recent coverage:
Common questions.
Anything not covered here, ask the team directly through the form below.
What does the Foundry Industry Model include?
Foundry and wafer revenue and ASPs by node, wafer shipments by node, non-wafer revenue streams, installed capacity and utilization by node, capex, wafer starts by customer and end market, detailed TSMC–Apple modeling, and financial metrics including margins, R&D, depreciation, COGS, and inventory, with quarterly forecasts through 2030. The bundle also includes the Apple, Intel, and Huawei wafer-demand models, the analog and power supply-demand model, the EDA Model, the TSMC MOPS Capital Budget Model, and the live Foundry and EDA dashboards.
Which companies does it cover?
Operating foundries covered include TSMC, Samsung Foundry, SMIC, UMC, GlobalFoundries, Tower Semiconductor, Hua Hong, DB HiTek, Vanguard International Semiconductor, Powerchip, X-Fab, Intel Foundry, SkyWater, and other tracked manufacturers, with more than 20 years of history for the five largest and more than 10 years for the rest. Announced and emerging projects, including Rapidus, Tata Electronics, and Tesla Terafab, are monitored and clearly distinguished from operating foundries.
How is the model built?
Bottom-up from proprietary wafers-per-tool calculations and fab build plan tracking, blended with conference materials, public filings, customs data, and primary research. Fabless revenue, COGS, and inventory reconcile the demand side, leading-edge wafer starts are built bottom-up, fab by fab, from our customer wafer-demand models, bottom-up cost models estimate margins, and everything is back-tested against reported results each quarter.
How is the model delivered?
As a quarterly Excel workbook with the raw tables and near-term forecasts, alongside a quarterly PDF snapshot with charts and executive insights. Market-event addenda ship between releases, and the live Foundry and EDA dashboards support company, process-node, market, and mature-node analysis with exportable charts and tables.
Is it part of the SemiAnalysis newsletter subscription?
No. Industry models are separate institutional offerings and are not included with the annual newsletter membership.
Models that pair with this one.
The foundry sits mid-chain: tools go in, wafers come out, and chips land in datacenters. The other models cover each link.
Wafer Fab Equipment Model
The toolsThe equipment inside the fabs this model counts: WFE demand by segment, tool by tool.
View model
Accelerator & HBM Model
The chipsWhat the leading-edge wafers become: accelerator shipments, SKU by SKU, buyer by buyer.
View model
Datacenter Industry Model
The destinationWhere the chips built on these wafers end up: datacenter capacity, power, and buildouts, site by site.
View modelGet the Foundry Industry Model.
Start with the sales team. They come back with scoping, licensing, and pricing for your mandate.
- Scoped to your use case
- Quarterly releases with market-event addenda
- Custom research engagements available
