Chip Industry Week In Review


DAC: Chips to Systems Conference  The energy and buzz at this year's Design Automation Conference surprised everyone — despite initial concerns about its location in Long Beach, California, which is well off the beaten path for semiconductors. Hot topics included AI automation, multiphysics simulation, compute-in-memory, chiplets, physical  AI, and the development and orchestration of AI a... » read more

AI Agent Orchestration For ASIC Autonomy


The use of AI agents in chip design has been limited to small portions of the design flow. Engineers have been proceeding cautiously to understand how agents work, how to ensure they are delivering consistent results, and how different agents work together. The next step is to extend their role beyond just gluing together coding and tooling functions. Mehir Arora, head of engineering at ChipAge... » read more

Preparing For AI-Driven Chip Design And Verification


Key Takeaways: Agentic AI will fundamentally change how engineers approach design and verification, and it will require them to adapt or be left behind. AI is a black box, so ensuring reliability will require external observability through sandboxing, along with other safeguards in case something does go wrong. The concentration of profitability in a few companies will shift as agent... » read more

Chip Industry Week In Review


Notable deals  Amkor and Nvidia signed a $1.5B multiyear agreement to develop advanced packaging and test technologies for next-gen AI and accelerated-computing platforms. Nvidia’s prepayment will support Amkor’s U.S. capacity expansion in Arizona, including high-density interconnect and heterogeneous integration capabilities. Siemens announced plans to acquire two EDA companies: D... » read more

Designing Electro-Optical Chips


Key Takeaways: Silicon photonics is moving into mainstream AI, data center, and communications systems, but the design flow still needs tighter integration between photonic, electronic, package, thermal, and system-level tools. Existing EDA infrastructure can be reused for photonics, but waveguides, optical phase, wavelength, polarization, thermal drift, and compact modeling require spe... » read more

Why Chip Engineers Should Care About AI-Created Behavioral Models


You probably know this bottleneck too well: full transistor-level or physical simulations—whether analog circuit, electromagnetic, or thermal—can take weeks or even months. For complex designs, simulating every internal transistor in every block quickly becomes impractical. This is why creating accurate behavioral models is so important. A good behavioral model captures a block's input-o... » read more

The Impact Of AI Automation On Chip Design


Key Takeaways: Tools are currently built with a defined notion of how they will be used. For agentic solutions they will be transformed into collections of callable engines. Agents may be built by EDA companies for design houses or larger design houses may build their own, potentially transforming the EDA business model. The role of engineers will change, but exactly how is not certa... » read more

Chip Industry Week In Review


Advanced manufacturing, packaging Intel Foundry will invest €5B to expand Intel 3 capacity at its Leixlip, Ireland campus. The company also entered high-volume manufacturing for a subset of Panther Lake processors manufactured on its 18A using ASML’s High-NA EUV technology. UMC delivered the first production wafers for SILITH’s 1.6T silicon photonics platform from its 300mm Singa... » read more

AI In Chip Design: Lots Of Promise, Plenty Of Unanswered Questions


Key Takeaways: AI opens the door to exploring a much larger solution space, similar to what high-level synthesis did years ago, but questions persist about the impact of increasing reliance on what is essentially a black-box chip design. There is no consistent answer to how successful AI will be, where it will succeed or fail, or how it will apply to different markets and EDA customers.... » read more

An AI Model Fit For Purpose


Key takeaways A model can only be used for its intended purpose, in a defined context, without taking unknown risks. Models must be created using a well-defined process and verified in a way that provides a level of independence. Deployment requires trust and a way to track the properties of the model. A model captures some kind of behavior exhibited in the real world, but a... » read more

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